DNP develops a new generation of intermediate layer for semiconductor packaging

According to Japanese media reports, DNP has developed a new generation of relay element interposers for semiconductor packaging.

According to the official website of Japanese media Da Nippon Printing, with the development of digital transformation (DX) on a global scale, the semiconductor market is expected to grow further, especially with regard to the new generation of 5G and later 5G communication systems and artificial intelligence (AI). The product puts forward higher requirements. In order to realize the high function, high speed and low power consumption performance of semiconductor products, the development of the miniaturization process of silicon wafers is required, but the complex process and high cost make the development of miniaturization close to the limit. In this case, as a method to further improve performance, a new generation of packaging technology is attracting people's attention.

The method is to mount multiple chips with different functions, such as CPU and memory, on the same substrate in high density to increase the processing speed. This time, DNP has developed a relay element "interposer" that plays a key role in packaging technology, which can electrically connect multiple semiconductor chips and substrates.

DNP has vigorously developed the "miniature processing technology" derived from the core of the printing process and applied it to the manufacture of "photomask" plates for drawing semiconductor circuit patterns, and "templates for the next generation of pattern transfer nanoimprint lithography technology" ", and provide foundry services for sensor MEMS. Through the use of glass and silicon substrate processing and processing technology and miniature wiring technology accumulated in the past business, the high-performance interposer has been successfully developed this time.

This type of interposer solves the problem of "increased wiring resistance and reduced insulation between wirings due to deterioration of wiring layers" that has become apparent with miniaturized wiring, and realizes high-performance miniaturized wiring required for next-generation semiconductor packaging .

DNP participated in the consortium "JOINT2 (Jisso OpenInnovation Network of Tops 2, with Showa Denko as the chairman unit)" composed of 12 companies engaged in semiconductor packaging materials and equipment research and development. The purpose is to establish next-generation semiconductor packaging and evaluation technology for Preparations for mass production of the intermediary layer in 2024. Through the development of JOINT2 and the cooperation with participating companies, DNP will continue to promote the functional development and mass production of the interposer, and make efforts to promote the development of a new generation of semiconductor packaging technology.